1. Field of Invention
Exemplary embodiments described herein relate generally to non-volatile memory devices, methods of manufacturing the same and methods of operating the same. More particularly, exemplary embodiments described herein relate to a non-volatile memory device including a variable resistance material, a method of manufacturing the same, and a method of operating the same.
2. Description of the Related Art
Generally, non-volatile memory devices may be classified as floating gate-type memory devices or charge trap-type memory devices in accordance with the structure of unit cell incorporated therein.
The unit cell of a typical floating gate-type non-volatile memory device includes a tunnel oxide layer, a floating gate, a dielectric layer and a control gate sequentially formed on a semiconductor substrate. The floating gate-type non-volatile memory device may store information by charging/discharging electrons into/out of the floating gate.
In contrast, the unit cell of a typical charge trap-type non-volatile memory device includes a tunnel insulation layer including silicon oxide, a charge-trapping layer including silicon nitride, a blocking layer including silicon oxide, and an electrode including doped polysilicon sequentially formed on a semiconductor substrate. Information may be programmed in the charge trap-type non-volatile memory device by storing charges in the charge-trapping layer between the electrode and the semiconductor substrate. Information may be erased from the charge trap-type non-volatile memory device by discharging the charges from the charge-trapping layer.
The floating gate-type non-volatile memory device and the charge trap-type non-volatile memory device may program or erase data in a cell using charges. However, in these conventional non-volatile memory devices, charges may be undesirably discharged due to interference between adjacent cells. This may cause malfunction of the non-volatile memory device.
Further, a NOR-type non-volatile memory device may be programmed according to a hot carrier injection process. Thus, a punch-through effect may be frequently generated between a source region and a drain region during the programming process. Furthermore, conventional NOR-type non-volatile memory devices typically require a high voltage of about 10V in order to operate. To apply such a high voltage to the NOR-type non-volatile memory device, elements such as a high voltage transistor need to be formed in a core region and a peripheral region of a substrate. As a result, the NOR-type non-volatile memory device may become undesirably large in size.